HIP datasheet, HIP pdf, HIP data sheet, datasheet, data sheet, pdf , Intersil, Driver, Full Bridge FET, No Charge Pump. HIP 80V/A Peak Current Full Bridge Fet Driver. The is a medium frequency, medium voltage H-Bridge N-Channel MOSFET driver IC, available in HIP Data Sheet. FN CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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HIP 80V/A Peak Current Full Bridge FET Driver _ BDTIC a Leading Distributor in China
Mold flash or protrusions shall not exceed 0. Similar to the HIP, it has a flexible input protocol for. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result. Drives pF Load in Free Air at 50? E and e A are measured with the leads constrained to be perpendic.
Dqtasheet BHI Pin 2 is driven high or not connected. B High-side Bootstrap supply. Upper Turn-off Propagation Delay. These devices are sensitive to electrostatic discharge; follow datasyeet IC Handling Procedures.
Dimension “E” does not include interlead flash or protrusions. The chamfer on the body is optional.
DIS high overrides all other inputs. Bootstrap Capacitor when Pulled Low. High Level Output Voltage. A High-side Bootstrap supply.
In case of conflict between English and. This is a stress only rating and operation of the. Dataasheet High-side Source connection. Upper Turn-on Propagation Delay. Logic level input that controls ALO driver Pin N is the maximum datwsheet of terminal positions.
De-couple this pin to V SS Pin 6. Logic level input that controls BLO driver Pin Intersil Pb-free products employ special Pb-free material. User-Programmable Dead Time 0. All voltages are relative V SS unless otherwise specified. If AHI Pin 7 is driven high or not connected.
HIP datasheet, Pinout ,application circuits 80 V/ A Peak Current Full Bridge FET Driver
Voltage on V SS. Lower Turn-on Propagation Delay.
Terminal numbers are shown for reference only. When DIS is taken low the outputs are controlled by the other inputs. The pin can be driven by signal levels of 0V to 15V no greater than. DIS – Upper Outputs. X signifies that input can be either a “1” or “0”. HIP’s reduced drive current allows smaller packaging. Low Level Input Voltage.
For information regarding Intersil Corporation and its products, see www.
80 V/1.25 A Peak Current Full Bridge FET Driver
Times of Typically 15ns. Connect cathode of bootstrap.
Connect resistor from this pin to V SS to set timing current that defines the dead time between drivers. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Positive supply to control logic and lower gate drivers. Information furnished by Intersil is believed to be accurate and. C with Rise and Fall. Mold flash, protrusion dahasheet gate burrs shall not exceed.